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<title>antcc/ir/abi0.c, branch trunk</title>
<subtitle>A little C compiler</subtitle>
<id>https://git.lemon.rip/antcc/atom?h=trunk</id>
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<updated>2026-03-17T12:22:00+00:00</updated>
<entry>
<title>REFACTOR: move sources to src/</title>
<updated>2026-03-17T12:22:00+00:00</updated>
<author>
<name>lemon</name>
<email>lsof@mailbox.org</email>
</author>
<published>2026-03-17T12:22:00+00:00</published>
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<id>urn:sha1:a8d6f8bf30c07edb775e56889f568ca20240bedf</id>
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</content>
</entry>
<entry>
<title>ir bugfixes</title>
<updated>2026-01-04T13:28:42+00:00</updated>
<author>
<name>lemon</name>
<email>lsof@mailbox.org</email>
</author>
<published>2026-01-04T13:28:42+00:00</published>
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<id>urn:sha1:65d56cb113ebf09664bbade47b1c4c2e960ba336</id>
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</entry>
<entry>
<title>backend: separate instrs for integer/float store</title>
<updated>2025-12-31T10:13:15+00:00</updated>
<author>
<name>lemon</name>
<email>lsof@mailbox.org</email>
</author>
<published>2025-12-31T10:13:15+00:00</published>
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</content>
</entry>
<entry>
<title>abi0: get rid of manual instruse reordering</title>
<updated>2025-12-24T08:44:30+00:00</updated>
<author>
<name>lemon</name>
<email>lsof@mailbox.org</email>
</author>
<published>2025-12-24T08:44:30+00:00</published>
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Vestigial, wasn't enough and we're sorting uses in mem2reg now.
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</entry>
<entry>
<title>backend: unify pass memory allocation strategies</title>
<updated>2025-12-20T18:31:50+00:00</updated>
<author>
<name>lemon</name>
<email>lsof@mailbox.org</email>
</author>
<published>2025-12-20T16:59:40+00:00</published>
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It was all over the place for temporary data structures used by
individual passes. Now there is an arena specifically for that, which is
nicer.
</content>
</entry>
<entry>
<title>rename arraylength macro -&gt; countof</title>
<updated>2025-12-11T19:43:24+00:00</updated>
<author>
<name>lemon</name>
<email>lsof@mailbox.org</email>
</author>
<published>2025-12-11T19:43:24+00:00</published>
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<id>urn:sha1:88652eeb10cd9381aafb2d55e9474bb0799630b1</id>
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</content>
</entry>
<entry>
<title>abi: fix aggregate passed by regs 2nd reg offset</title>
<updated>2025-12-06T17:59:53+00:00</updated>
<author>
<name>lemon</name>
<email>lsof@mailbox.org</email>
</author>
<published>2025-12-06T17:59:53+00:00</published>
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<content type='text'>
It was broken for example `struct { i32 a; f64 b; }` (would try to
load/store b from byte offset 4, not 8). Introduce r2off, realize in
x86-64 it's always 8; even `struct {i32 a; f32 b;}` gets passed in one
(integer) register. But not so in (future) ABIs like RISC-V, I believe
there `{i32, f32}` would get passed in 1 integer and 1 float register
(r2off = 4).
</content>
</entry>
<entry>
<title>abi/isel: aggregate args in stack wip</title>
<updated>2025-11-27T20:35:12+00:00</updated>
<author>
<name>lemon</name>
<email>lsof@mailbox.org</email>
</author>
<published>2025-11-27T20:35:12+00:00</published>
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</entry>
<entry>
<title>implement float varargs, and some other fixes</title>
<updated>2025-11-23T14:29:55+00:00</updated>
<author>
<name>lemon</name>
<email>lsof@mailbox.org</email>
</author>
<published>2025-11-23T11:02:27+00:00</published>
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</entry>
<entry>
<title>ir: barebones IR passes checked contracts</title>
<updated>2025-11-21T16:35:55+00:00</updated>
<author>
<name>lemon</name>
<email>lsof@mailbox.org</email>
</author>
<published>2025-11-21T16:07:28+00:00</published>
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