<feed xmlns='http://www.w3.org/2005/Atom'>
<title>antcc/ir/regalloc.c, branch trunk</title>
<subtitle>A little C compiler</subtitle>
<id>https://git.lemon.rip/antcc/atom?h=trunk</id>
<link rel='self' href='https://git.lemon.rip/antcc/atom?h=trunk'/>
<link rel='alternate' type='text/html' href='https://git.lemon.rip/antcc/'/>
<updated>2026-03-17T12:22:00+00:00</updated>
<entry>
<title>REFACTOR: move sources to src/</title>
<updated>2026-03-17T12:22:00+00:00</updated>
<author>
<name>lemon</name>
<email>lsof@mailbox.org</email>
</author>
<published>2026-03-17T12:22:00+00:00</published>
<link rel='alternate' type='text/html' href='https://git.lemon.rip/antcc/commit/?id=a8d6f8bf30c07edb775e56889f568ca20240bedf'/>
<id>urn:sha1:a8d6f8bf30c07edb775e56889f568ca20240bedf</id>
<content type='text'>
</content>
</entry>
<entry>
<title>regalloc: improve spilling and cleanup</title>
<updated>2026-03-16T17:15:37+00:00</updated>
<author>
<name>lemon</name>
<email>lsof@mailbox.org</email>
</author>
<published>2026-03-16T17:15:37+00:00</published>
<link rel='alternate' type='text/html' href='https://git.lemon.rip/antcc/commit/?id=28261b6b1b55184ce7084eb14cdcb42edc7f8480'/>
<id>urn:sha1:28261b6b1b55184ce7084eb14cdcb42edc7f8480</id>
<content type='text'>
Instead of spilling current interval when running out of registers,
spill the longest-lived active interval with a lower spill cost than
current. Spill costs are estimated based on multiplicative loop depth.
Also cleanup regalloc.c somewhat.
Update todo.txt too.
</content>
</entry>
<entry>
<title>regalloc: fix minor regression with storing of regs into spilled stack slots</title>
<updated>2026-03-04T16:26:23+00:00</updated>
<author>
<name>lemon</name>
<email>lsof@mailbox.org</email>
</author>
<published>2026-03-04T16:26:23+00:00</published>
<link rel='alternate' type='text/html' href='https://git.lemon.rip/antcc/commit/?id=4fa7cc840f591392d1d2c58c60e4f3e403050f1f'/>
<id>urn:sha1:4fa7cc840f591392d1d2c58c60e4f3e403050f1f</id>
<content type='text'>
</content>
</entry>
<entry>
<title>ir: make address ref hash table resizable</title>
<updated>2026-02-28T19:38:55+00:00</updated>
<author>
<name>lemon</name>
<email>lsof@mailbox.org</email>
</author>
<published>2026-02-28T19:38:55+00:00</published>
<link rel='alternate' type='text/html' href='https://git.lemon.rip/antcc/commit/?id=f06da11d8524a9eb7fe984171d4462cef8eac2e6'/>
<id>urn:sha1:f06da11d8524a9eb7fe984171d4462cef8eac2e6</id>
<content type='text'>
Would hit the limit on very large functions (thanks csmith).
</content>
</entry>
<entry>
<title>regalloc: fix defn of spilled var with immediate</title>
<updated>2026-02-28T08:12:18+00:00</updated>
<author>
<name>lemon</name>
<email>lsof@mailbox.org</email>
</author>
<published>2026-02-28T08:12:18+00:00</published>
<link rel='alternate' type='text/html' href='https://git.lemon.rip/antcc/commit/?id=c0db7d92c14b242daf008f7e3731a5d080e23fa1'/>
<id>urn:sha1:c0db7d92c14b242daf008f7e3731a5d080e23fa1</id>
<content type='text'>
With `i64 %a = copy 0xabcdef12345`, if `%a` was spilled, this would turn
into a `storei64` instruction with an unencondable immediate operand
(larger than 32 bits in x86, non-zero in aarch64).
</content>
</entry>
<entry>
<title>ir: regalloc &amp; x86-64 isel bugfixes</title>
<updated>2026-02-18T17:19:29+00:00</updated>
<author>
<name>lemon</name>
<email>lsof@mailbox.org</email>
</author>
<published>2026-02-18T17:19:29+00:00</published>
<link rel='alternate' type='text/html' href='https://git.lemon.rip/antcc/commit/?id=350a56d155e4dc5a5fc48bd2ab724dcbfc103d45'/>
<id>urn:sha1:350a56d155e4dc5a5fc48bd2ab724dcbfc103d45</id>
<content type='text'>
</content>
</entry>
<entry>
<title>codegen: eliminate redudant consecutive ret sequences</title>
<updated>2026-01-08T11:21:40+00:00</updated>
<author>
<name>lemon</name>
<email>lsof@mailbox.org</email>
</author>
<published>2026-01-08T11:21:40+00:00</published>
<link rel='alternate' type='text/html' href='https://git.lemon.rip/antcc/commit/?id=2769a58ab256522eafec1f833676ceffb4baff24'/>
<id>urn:sha1:2769a58ab256522eafec1f833676ceffb4baff24</id>
<content type='text'>
</content>
</entry>
<entry>
<title>rega: fix spill copy of i32 -&gt; i64</title>
<updated>2026-01-04T07:58:04+00:00</updated>
<author>
<name>lemon</name>
<email>lsof@mailbox.org</email>
</author>
<published>2026-01-04T07:58:04+00:00</published>
<link rel='alternate' type='text/html' href='https://git.lemon.rip/antcc/commit/?id=b826bf418330b9b13a26195ee541e9e7fd9e77ac'/>
<id>urn:sha1:b826bf418330b9b13a26195ee541e9e7fd9e77ac</id>
<content type='text'>
</content>
</entry>
<entry>
<title>backend: separate instrs for integer/float store</title>
<updated>2025-12-31T10:13:15+00:00</updated>
<author>
<name>lemon</name>
<email>lsof@mailbox.org</email>
</author>
<published>2025-12-31T10:13:15+00:00</published>
<link rel='alternate' type='text/html' href='https://git.lemon.rip/antcc/commit/?id=97c6d5c44f30b29b52d1dc431ab9f2df4bb47fd2'/>
<id>urn:sha1:97c6d5c44f30b29b52d1dc431ab9f2df4bb47fd2</id>
<content type='text'>
</content>
</entry>
<entry>
<title>ir: use BIT macro for regset (1&lt;&lt; is wrong for u64)</title>
<updated>2025-12-23T09:08:34+00:00</updated>
<author>
<name>lemon</name>
<email>lsof@mailbox.org</email>
</author>
<published>2025-12-23T09:08:34+00:00</published>
<link rel='alternate' type='text/html' href='https://git.lemon.rip/antcc/commit/?id=56cf12a2aca36fabf3c3918947a88cbc4a605bb2'/>
<id>urn:sha1:56cf12a2aca36fabf3c3918947a88cbc4a605bb2</id>
<content type='text'>
</content>
</entry>
</feed>
