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<title>antcc/src/t_x86-64_isel.c, branch trunk</title>
<subtitle>A little C compiler</subtitle>
<id>https://git.lemon.rip/antcc/atom?h=trunk</id>
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<updated>2026-04-09T17:32:24+00:00</updated>
<entry>
<title>x86-64/isel: always test for ZF after shift</title>
<updated>2026-04-09T17:32:24+00:00</updated>
<author>
<name>lemon</name>
<email>lsof@mailbox.org</email>
</author>
<published>2026-04-09T17:32:24+00:00</published>
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<id>urn:sha1:010ed5bc8a6840602776ddd1a2d4b7f817b0c56e</id>
<content type='text'>
The shift instructions do not update flags if the shift amount was zero,
so can't realiably do this micro optimization
</content>
</entry>
<entry>
<title>x86-64/isel: fix stack addr regression from 8b79b61ae7</title>
<updated>2026-04-09T08:24:07+00:00</updated>
<author>
<name>lemon</name>
<email>lsof@mailbox.org</email>
</author>
<published>2026-04-09T08:22:24+00:00</published>
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<id>urn:sha1:7355aa3e9e88b7236fc86226b50ce820c7ff5220</id>
<content type='text'>
Checks for RADDR should also look for RSTACK when fusing addresses
</content>
</entry>
<entry>
<title>x86-64/isel: use integer stores for storing float constants</title>
<updated>2026-04-09T07:54:58+00:00</updated>
<author>
<name>lemon</name>
<email>lsof@mailbox.org</email>
</author>
<published>2026-04-09T07:54:58+00:00</published>
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<id>urn:sha1:53c789eb351e0281026d7145dc6dbc83338d7aa8</id>
<content type='text'>
Because the integer mov can have immediate operands, avoids a round trip
through an XMM register.
</content>
</entry>
<entry>
<title>Implement basic aarch64 struct arg passing ABI</title>
<updated>2026-04-08T08:26:18+00:00</updated>
<author>
<name>lemon</name>
<email>lsof@mailbox.org</email>
</author>
<published>2026-04-08T08:26:18+00:00</published>
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<id>urn:sha1:8b79b61ae78c91c069447331ed64d400187bdd77</id>
<content type='text'>
- Missing: vaargs, &gt;2 member HFAs

- Reworked the way stack allocation references are lowered. Now RSTACK
  persists throughout all passes until emit. This allows deferring stack
  frame layouting until the end in a less messy way than before, which
  was emiting frame-pointer relative addresses @ isel time and patching them up
  later in emit to account for actual stack frame layout.
</content>
</entry>
<entry>
<title>style: change uvlong -&gt; u64int, vlong -&gt; s64int</title>
<updated>2026-03-22T21:00:35+00:00</updated>
<author>
<name>lemon</name>
<email>lsof@mailbox.org</email>
</author>
<published>2026-03-22T21:00:35+00:00</published>
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<id>urn:sha1:7c5dd45eca377a3b675b6f0d4a9331bc3f971ac9</id>
<content type='text'>
Is much nicer. I don't know whether I want to do it for the other int
types too. char and uchar are fine as bytes. u/short -&gt; u/s16int, maybe.
</content>
</entry>
<entry>
<title>IR: add 3rd operand to Instr</title>
<updated>2026-03-22T09:49:26+00:00</updated>
<author>
<name>lemon</name>
<email>lsof@mailbox.org</email>
</author>
<published>2026-03-21T21:20:34+00:00</published>
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<id>urn:sha1:79874c83bf76a5b3efd3d558933b90d9b53b829e</id>
<content type='text'>
The motivation is for aarch64 msub/madd instrs, for isel to produce. But
it should be useful for other things too.
</content>
</entry>
<entry>
<title>Refactor: use typedefs and CamelCase for aggregate types</title>
<updated>2026-03-18T10:33:41+00:00</updated>
<author>
<name>lemon</name>
<email>lsof@mailbox.org</email>
</author>
<published>2026-03-18T10:33:41+00:00</published>
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<id>urn:sha1:1d9e19fb3bb941cdc28e9d4c3063d3e213fd8312</id>
<content type='text'>
Looks nicer
</content>
</entry>
<entry>
<title>REFACTOR: finish renaming</title>
<updated>2026-03-17T15:10:00+00:00</updated>
<author>
<name>lemon</name>
<email>lsof@mailbox.org</email>
</author>
<published>2026-03-17T12:43:05+00:00</published>
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<id>urn:sha1:3eeb6f219e4d32160fa10895b57a8ddfefff5ff7</id>
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</content>
</entry>
<entry>
<title>REFACTOR: move sources to src/</title>
<updated>2026-03-17T12:22:00+00:00</updated>
<author>
<name>lemon</name>
<email>lsof@mailbox.org</email>
</author>
<published>2026-03-17T12:22:00+00:00</published>
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<id>urn:sha1:a8d6f8bf30c07edb775e56889f568ca20240bedf</id>
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</entry>
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