| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | driver: use fexecve for -run | 2025-12-08 | 1 | -17/+18 | |
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| * | Add lua 5.4.0 test suite | 2025-12-07 | 121 | -2/+59828 | |
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| * | test/12-flt: add some weird float cmp edgecases | 2025-12-07 | 1 | -2/+9 | |
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| * | io: just use sprintf for printing doubles | 2025-12-07 | 1 | -28/+6 | |
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| * | amd64: fix wrong condition code being used for float gth | 2025-12-07 | 1 | -1/+1 | |
| | | | | | ughh | ||||
| * | amd64: use XORPS for floating point negation | 2025-12-07 | 2 | -3/+7 | |
| | | | | | | | | | | | Previously `neg x` was being turned into `sub 0, x`. But this gives the wrong result for zero/negative zero (-0.0 == -0.0 but 0.0 - 0.0 == 0.0), so it wasn't IEEE compliant or correct. Do what every other compiler does instead and flip the sign bit with an exclusive or. Should implement someway of deduplicating small data constants like the ones used here though. | ||||
| * | abi: fix aggregate passed by regs 2nd reg offset | 2025-12-06 | 3 | -27/+35 | |
| | | | | | | | | | | It was broken for example `struct { i32 a; f64 b; }` (would try to load/store b from byte offset 4, not 8). Introduce r2off, realize in x86-64 it's always 8; even `struct {i32 a; f32 b;}` gets passed in one (integer) register. But not so in (future) ABIs like RISC-V, I believe there `{i32, f32}` would get passed in 1 integer and 1 float register (r2off = 4). | ||||
| * | add command-line predefined macros (-D, -U) | 2025-12-06 | 10 | -20/+107 | |
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| * | test 12-flt | 2025-12-05 | 3 | -4/+36 | |
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| * | amd64: fix pseudo-push/pop float reg | 2025-12-05 | 1 | -2/+2 | |
| | | | | | | | With add/sub flags can be trashed which can result in miscompilations, use lea. This shouldn't even exist, need to get rid of xsave/xrestore, but for now fix this kludge | ||||
| * | isel: fix flipped sub not being inplace | 2025-12-05 | 1 | -0/+1 | |
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| * | amd64: handle unoredered float cmps | 2025-12-05 | 1 | -2/+30 | |
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| * | ir: float fold div/0 | 2025-12-05 | 1 | -4/+3 | |
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| * | io: print nans as NaN | 2025-12-05 | 1 | -0/+5 | |
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| * | eval: fix float cmps | 2025-12-05 | 1 | -0/+2 | |
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| * | update todo.txt | 2025-12-04 | 1 | -1/+2 | |
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| * | driver: more commandline option placeholders, .a file support | 2025-12-04 | 1 | -3/+9 | |
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| * | regalloc: kill dead defs of physical regs | 2025-12-04 | 1 | -8/+16 | |
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| * | isel: fix immediate of flipped sub | 2025-12-04 | 1 | -0/+1 | |
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| * | cpp: implement preprocessor expressions short circuiting behaviour | 2025-12-03 | 1 | -17/+23 | |
| | | | | | This only affects whether an error is given for something like `0 && 0/0` (it shouldn't) | ||||
| * | c: allow redeclaration with K&R and non K&R prototypes | 2025-12-03 | 1 | -2/+10 | |
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| * | preprocessor: add #ifndef...#endif include guard optimization | 2025-12-02 | 4 | -16/+38 | |
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| * | test/11-abi | 2025-12-02 | 2 | -6/+46 | |
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| * | c: make tentative definitions work | 2025-12-02 | 5 | -18/+57 | |
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| * | c: narrowing ints of different signedness... | 2025-12-01 | 1 | -1/+1 | |
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| * | c: edgecase for redeclaration of implicit sized array | 2025-12-01 | 1 | -1/+1 | |
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| * | driver: add -run option like tcc | 2025-11-30 | 2 | -24/+80 | |
| | | | | | convenient for quick testing | ||||
| * | c: fix some decl bugs and diagnostics | 2025-11-30 | 1 | -18/+34 | |
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| * | amd64/isel: fix addressing index shift being possibly too large to encode (duh) | 2025-11-29 | 2 | -1/+2 | |
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| * | lex: remove some hacks and optimize preprocessor | 2025-11-28 | 2 | -40/+35 | |
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| * | isel: fix branch arg | 2025-11-27 | 1 | -0/+2 | |
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| * | abi/isel: aggregate args in stack wip | 2025-11-27 | 2 | -15/+42 | |
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| * | regalloc: skip dead phis | 2025-11-26 | 1 | -1/+4 | |
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| * | c/type: make implicit const T* -> T* conversion warning, not error | 2025-11-26 | 3 | -4/+11 | |
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| * | io: diagnostics print source code underline correctly with hard tabs | 2025-11-26 | 1 | -8/+26 | |
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| * | c: more static initializer fixes | 2025-11-26 | 2 | -7/+9 | |
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| * | c: fix elided-braces initializers for nested unions | 2025-11-26 | 1 | -5/+16 | |
| | | | | | | | | | For example in ```c struct {int a; union { int b,c; }; int d; } X = {1,2,3}; ``` Fields `a`,`b`,`d` must get initialized to 1,2,3. Not `c` | ||||
| * | use bstdout for -E | 2025-11-26 | 2 | -7/+7 | |
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| * | amd64/emit: I64 consts and fp push/pop | 2025-11-24 | 1 | -7/+22 | |
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| * | fix regression w/ store instr + memory immediate | 2025-11-24 | 1 | -11/+13 | |
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| * | pp: fix token pasting (hopefully) | 2025-11-24 | 1 | -27/+15 | |
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| * | bootstrapping 🎉 | 2025-11-24 | 3 | -2/+24 | |
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| * | ir: simplify some occurrences of single-argument phis | 2025-11-24 | 2 | -8/+17 | |
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| * | c: fix condexprvalue | 2025-11-24 | 1 | -54/+42 | |
| | | | | | | The original implementation was broken when presented with nested short-circuiting logical operators. | ||||
| * | c: remove unused function | 2025-11-24 | 1 | -8/+0 | |
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| * | c: create dummy unreachable block after trap | 2025-11-24 | 2 | -5/+2 | |
| | | | | | | | Reverts 9abe27f6712. This simplies expr codegen, otherwise would manually have to check `fn->curblk != NULL` repeatedly. Later passes will easily delete those unreachable blocks | ||||
| * | isel: loadstoreaddr don't fuseaddr as much | 2025-11-24 | 1 | -3/+5 | |
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| * | ir.h: tweak mkintrin() definition to work with tinycc | 2025-11-24 | 1 | -1/+1 | |
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| * | ir: implement cvtu64f. and other bug fixes | 2025-11-23 | 5 | -12/+50 | |
| | | | | | | compiler is bootstrapping?! however, stage1 and stage2+ executables aren't bit-identical.. small differences in the codegen.. need to look into that | ||||
| * | implement cvtfXu64 by lowering it in builder | 2025-11-23 | 2 | -11/+48 | |
| | | | | | this should probably be in a separate pass? | ||||