| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | rename arraylength macro -> countof | 2025-12-11 | 1 | -1/+1 | |
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| * | abi: fix aggregate passed by regs 2nd reg offset | 2025-12-06 | 1 | -3/+7 | |
| | | | | | | | | | | It was broken for example `struct { i32 a; f64 b; }` (would try to load/store b from byte offset 4, not 8). Introduce r2off, realize in x86-64 it's always 8; even `struct {i32 a; f32 b;}` gets passed in one (integer) register. But not so in (future) ABIs like RISC-V, I believe there `{i32, f32}` would get passed in 1 integer and 1 float register (r2off = 4). | ||||
| * | add command-line predefined macros (-D, -U) | 2025-12-06 | 1 | -1/+0 | |
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| * | amd64: va_arg for small aggregates | 2025-11-23 | 1 | -2/+8 | |
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| * | implement float varargs, and some other fixes | 2025-11-23 | 1 | -46/+45 | |
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| * | sysv: nested scalar classification of struct shouldn't return KPTR, used to ↵ | 2025-11-22 | 1 | -1/+1 | |
| | | | | | indicate aggregate in the stack | ||||
| * | change op names to match 285063eba44 | 2025-11-21 | 1 | -11/+11 | |
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| * | rename IR classes to reflect bitsize | 2025-11-21 | 1 | -7/+7 | |
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| * | sysv: document vaargs stack layout stuff | 2025-11-14 | 1 | -3/+29 | |
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| * | preeliminary va_list support | 2025-11-14 | 1 | -3/+117 | |
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| * | amd64: fix aggregate abi stuff;; ir: fold, peephole optimizing constructors | 2025-11-05 | 1 | -17/+27 | |
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| * | regalloc: basic spilling support | 2025-09-13 | 1 | -0/+1 | |
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| * | amd64: bugfix | 2025-09-08 | 1 | -1/+0 | |
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| * | backend: fix regalloc to work with more complex dataflow | 2023-06-24 | 1 | -2/+2 | |
| | | | | | | | | | basically an allocation map at the beginning (in) and end (out) of each block is kept and after the first allocation pass another pass is ran to resolve allocation conflicts between each edge, plus another pass to finish lowering phi functions. also introduced `regset` and plenty of other miscellaneous fixes | ||||
| * | amd64: fix aggregate return in regs | 2023-06-20 | 1 | -3/+3 | |
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| * | forgot some statics | 2023-06-18 | 1 | -1/+1 | |
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| * | misc | 2023-06-17 | 1 | -0/+2 | |
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| * | lower allocas in isel() instead of emit() and misc fixes | 2023-06-13 | 1 | -4/+4 | |
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| * | register renaming and such | 2023-06-12 | 1 | -1/+1 | |
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| * | remove RPARAM, add Oparam, lower args/rets to abi regs in abi0 | 2023-06-11 | 1 | -5/+8 | |
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| * | isel skeleton | 2023-06-10 | 1 | -0/+1 | |
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| * | codegen skeleton | 2023-06-06 | 1 | -0/+1 | |
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| * | encode calls a different way in the IR | 2023-06-05 | 1 | -1/+1 | |
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| * | fix classify ptrs | 2023-06-05 | 1 | -2/+2 | |
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| * | goof | 2023-06-04 | 1 | -1/+5 | |
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| * | abi lowering pass | 2023-06-04 | 1 | -18/+56 | |
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| * | basic ABI lowering of aggregates | 2023-06-01 | 1 | -0/+103 | |
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| * | regalloc skeleton | 2023-05-31 | 1 | -0/+3 | |
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