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* a little refactoring and cleanup lemon2025-09-151-1/+14
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* regalloc: basic spilling support lemon2025-09-131-0/+1
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* fixes, delnops lemon2025-09-091-0/+1
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* regalloc: start implementing linear scan lemon2025-09-081-1/+4
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* regalloc fixes and rpo lemon2023-07-091-1/+2
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* add initializers (only static for initialier list rn) lemon2023-06-291-12/+4
| | | | and other fixes
* backend: fix mem2reg & regalloc lemon2023-06-261-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | they were broken, especially for unstructured control flow. most significant fix is to register allocator for temporaries that are used before the first definition in the source order, e.g.: @1: %x = add %y, 1 b @3 @2 %y = ... b @1 it's legal for %x to use %y there (assuming @2 dominates @1) but from the point of view of the register allocator %y is defined and freed and then used again, which broke things. the fix is to introduce phis for this situation: @1: %y.1 = phi @2 %y %x = add %y.1, 1 b @3 @2 %y = ... b @1 then regalloc phi handling code makes it work
* fix regalloc thinking some ins are dead by adding ins.keep lemon2023-06-241-1/+2
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* backend: fix regalloc to work with more complex dataflow lemon2023-06-241-5/+10
| | | | | | | | basically an allocation map at the beginning (in) and end (out) of each block is kept and after the first allocation pass another pass is ran to resolve allocation conflicts between each edge, plus another pass to finish lowering phi functions. also introduced `regset` and plenty of other miscellaneous fixes
* change RMORE -> RADDR; use RXXX (RNONE) for special args,also undef lemon2023-06-221-14/+15
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* misc fix lemon2023-06-221-1/+2
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* mem2reg: implement ssa construction; this breaks regalloc right now lemon2023-06-211-14/+15
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* explicitly store predecessors in each block lemon2023-06-211-12/+13
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* amd64/emit: ensure stack is 16-byte aligned lemon2023-06-201-0/+1
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* add basic mem2reg lemon2023-06-201-1/+11
| | | | | | | promotes uniform stack slots to temporaries currently only for immutable variables, next thing to implement is ssa construction
* don't lower params and args to registers in abi0 lemon2023-06-201-1/+1
| | | | | it's better to do it later, currently in isel(), but perhaps in a pre-isel abi1 pass
* fix cls logic for comparison instrs lemon2023-06-201-2/+4
| | | | | | | | previously instr.cls always represented the output dataclass. this doesn't work for comparisons because we know the output is always a boolean integer and we care about the actual comparison dataclass. so now .cls represents the operation dataclass, which matches the result class except for comparisons where the result is always KI4V
* backend: compile comparison instrs and branches lemon2023-06-191-0/+1
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* fix isel & emit for sym constants lemon2023-06-191-0/+1
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* ELF output static data lemon2023-06-181-2/+3
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* basic ELF output lemon2023-06-171-0/+1
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* misc lemon2023-06-171-0/+6
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* simpler handling of large constants in IR lemon2023-06-141-4/+8
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* lowering of structcopy lemon2023-06-131-0/+2
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* use a hashtable for addr refs lemon2023-06-131-1/+2
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* lower allocas in isel() instead of emit() and misc fixes lemon2023-06-131-8/+9
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* register renaming and such lemon2023-06-121-1/+1
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* remove RPARAM, add Oparam, lower args/rets to abi regs in abi0 lemon2023-06-111-4/+9
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* isel skeleton lemon2023-06-101-7/+19
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* codegen skeleton lemon2023-06-061-0/+5
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* encode calls a different way in the IR lemon2023-06-051-7/+8
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* style lemon2023-06-051-3/+2
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* strlits lemon2023-06-051-5/+8
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* abi lowering pass lemon2023-06-041-17/+38
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* basic ABI lowering of aggregates lemon2023-06-011-7/+26
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* struct args and return lemon2023-06-011-7/+14
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* regalloc skeleton lemon2023-05-311-7/+32
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* fix void conditional expr; condjump, condexprvalue optimizations lemon2023-05-311-0/+1
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* phis? lemon2023-05-301-16/+24
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* hm lemon2023-05-261-1/+1
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* initial commit lemon2023-05-101-0/+117