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* rename arraylength macro -> countof lemon2025-12-111-2/+2
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* abi: fix aggregate passed by regs 2nd reg offset lemon2025-12-061-21/+22
| | | | | | | | | It was broken for example `struct { i32 a; f64 b; }` (would try to load/store b from byte offset 4, not 8). Introduce r2off, realize in x86-64 it's always 8; even `struct {i32 a; f32 b;}` gets passed in one (integer) register. But not so in (future) ABIs like RISC-V, I believe there `{i32, f32}` would get passed in 1 integer and 1 float register (r2off = 4).
* abi/isel: aggregate args in stack wip lemon2025-11-271-9/+31
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* implement float varargs, and some other fixes lemon2025-11-231-1/+3
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* ir: barebones IR passes checked contracts lemon2025-11-211-0/+5
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* change op names to match 285063eba44 lemon2025-11-211-13/+13
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* rename IR classes to reflect bitsize lemon2025-11-211-10/+10
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* debug output to stdout lemon2025-11-191-1/+1
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* abi0: remove debugging leftover sortpo. but do number blks (free) lemon2025-11-141-1/+2
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* preeliminary va_list support lemon2025-11-141-7/+9
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* implement argument passing in stack lemon2025-11-121-0/+1
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* abi: fix unaligned & overflowing loads/stores, for small size/aligned ↵ lemon2025-11-091-48/+84
| | | | structs passed in regs
* codegen fixes, propagate terminate lemon2025-10-241-6/+8
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* codegen bugfixes lemon2025-10-191-0/+9
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* Organize source files into directories lemon2025-10-191-0/+393