From 19bbdfa3c7ae05f4694ce5e434d9855c6f2c3682 Mon Sep 17 00:00:00 2001 From: lemon Date: Sat, 24 Jun 2023 18:47:05 +0200 Subject: backend: fix regalloc to work with more complex dataflow basically an allocation map at the beginning (in) and end (out) of each block is kept and after the first allocation pass another pass is ran to resolve allocation conflicts between each edge, plus another pass to finish lowering phi functions. also introduced `regset` and plenty of other miscellaneous fixes --- amd64/sysv.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'amd64/sysv.c') diff --git a/amd64/sysv.c b/amd64/sysv.c index 9c7bc15..6c5b67c 100644 --- a/amd64/sysv.c +++ b/amd64/sysv.c @@ -141,8 +141,8 @@ const struct mctarg t_amd64_sysv = { .gpr0 = RAX, .ngpr = R15 - RAX + 1, .bpr = RBP, .fpr0 = XMM0, .nfpr = XMM15 - XMM0 + 1, - .rcallee = {{1<