From 79d6ac719042371d255ed1cf412e3232d13d1e56 Mon Sep 17 00:00:00 2001 From: lemon Date: Wed, 25 Mar 2026 16:36:29 +0100 Subject: aarch64 struct arg passing ABI wip --- src/t_aarch64_isel.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) (limited to 'src/t_aarch64_isel.c') diff --git a/src/t_aarch64_isel.c b/src/t_aarch64_isel.c index 0e43ea7..4490831 100644 --- a/src/t_aarch64_isel.c +++ b/src/t_aarch64_isel.c @@ -343,14 +343,18 @@ static void loadstoreaddr(Block *blk, Ref *r, int *curi, enum op op) { uint siz = oisload(op) ? loadsz[op-Oloads8] : storesz[op-Ostorei8]; + bool pcrelok = in_range(op, Oloads32, Oloadf64); /* LDR-LDRSW have PC-relative literal form */ if (isimm32(*r)) { - *r = mkaddr((IRAddr){.base = *r}); + regarg(r, KPTR, blk, curi); } else if (isaddrcon(*r, 0)) { - bool pcrelok = in_range(op, Oloads32, Oloadi64); /* LDR-LDRSW have PC-relative literal form */ if (!pcrelok || !(contab.p[r->i].flag & SLOCAL)) regarg(r, KPTR, blk, curi); } else if (r->t == RTMP || r->t == RSTACK) { - fuseaddr(r, blk, curi, siz); + Ref b; + if (fuseaddr(r, blk, curi, siz) + && isaddrcon(b = addrtab.p[r->i].base,0) + && (!pcrelok || !(contab.p[b.i].flag & SLOCAL))) + regarg(r, KPTR, blk, curi); } else if (r->t != RREG) { *r = insertinstr(blk, (*curi)++, mkinstr1(Ocopy, KPTR, *r)); } @@ -369,7 +373,7 @@ sel(Function *fn, Instr *ins, Block *blk, int *curi) } switch (op) { - //default: assert(0); + default: assert(0); case Onop: break; case Oalloca1: case Oalloca2: case Oalloca4: case Oalloca8: case Oalloca16: assert(!"unlowered alloca"); -- cgit v1.2.3