From 2c9174841434e39ba0a9675946efe25be0d8a168 Mon Sep 17 00:00:00 2001 From: lemon Date: Sat, 24 Jun 2023 22:49:48 +0200 Subject: backend: don't mixup float and int temps copy propagation only happens when dataclasses match, register allocator ignores hints if hint register class and instruction class differ, also add mov between int and float regs in amd64/emit --- ssa.c | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) (limited to 'ssa.c') diff --git a/ssa.c b/ssa.c index 4a4ed4d..fc4464b 100644 --- a/ssa.c +++ b/ssa.c @@ -12,11 +12,17 @@ copyopt(struct function *fn) struct use *use, *uend; union ref var = mkref(RTMP, blk->ins.p[i]); struct instr *ins = &instrtab[var.i]; + enum irclass k; if (ins->op == Ocopy) { - assert(ins->l.t != RREG); - - replcuses(var, ins->l); + union ref arg = ins->l; + if (arg.t == RTMP) k = insrescls(instrtab[arg.i]); + else if (arg.t == RICON) k = cls2siz[ins->cls] == 4 ? KI4 : KI8; + else if (arg.t == RXCON) k = isnumcon(arg) ? conht[arg.i].cls : KPTR; + else assert(0); + if (ins->cls != k) continue; + + replcuses(var, arg); *ins = mkinstr(Onop,0,); deluses(var.i); } -- cgit v1.2.3