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authorlemon <lsof@mailbox.org>2026-01-04 08:58:04 +0100
committerlemon <lsof@mailbox.org>2026-01-04 08:58:04 +0100
commitb826bf418330b9b13a26195ee541e9e7fd9e77ac (patch)
tree206e021249dd9296408e476ac38072b7d22e53ac /ir
parent12974932af785a2ab2cefb5bc80da3ee1211e3c3 (diff)
rega: fix spill copy of i32 -> i64
Diffstat (limited to 'ir')
-rw-r--r--ir/ir.c2
-rw-r--r--ir/ir.h2
-rw-r--r--ir/regalloc.c8
3 files changed, 6 insertions, 6 deletions
diff --git a/ir/ir.c b/ir/ir.c
index cc16919..f6c0aa2 100644
--- a/ir/ir.c
+++ b/ir/ir.c
@@ -4,7 +4,7 @@
uchar type2cls[NTYPETAG];
uchar cls2siz[] = { [KI32] = 4, [KI64] = 8, [KF32] = 4, [KF64] = 8 };
uchar cls2load[] = {
- [KI32] = Oloads32, [KI64] = Oloadi64,
+ [KI32] = Oloadu32, [KI64] = Oloadi64,
[KF32] = Oloadf32, [KF64] = Oloadf64, [KPTR] = -1
}, cls2store[] = {
[KI32] = Ostorei32, [KI64] = Ostorei64,
diff --git a/ir/ir.h b/ir/ir.h
index 5fe5e96..d072f23 100644
--- a/ir/ir.h
+++ b/ir/ir.h
@@ -187,7 +187,7 @@ struct function {
bool isleaf;
regset regusage;
};
-#define FREQUIRE(_prop) assert((fn->prop & (_prop)) && "preconditions not met")
+#define FREQUIRE(_prop) assert((fn->prop & (_prop)) == (_prop) && "preconditions not met")
enum objkind { OBJELF };
diff --git a/ir/regalloc.c b/ir/regalloc.c
index 39a3f74..14dfafc 100644
--- a/ir/regalloc.c
+++ b/ir/regalloc.c
@@ -1074,16 +1074,16 @@ devirt(struct rega *ra, struct block *blk)
int tr;
if (r->t == RTMP) {
alloc = (it = &ra->intervals.temps[r->i]) && it->nrange ? &it->alloc : NULL;
- if (alloc && alloc->t == ASTACK && ins->op == Omove) {
+ if (alloc && alloc->t == ASTACK && ins->op == Omove && kisint(ins->cls) == kisint(instrtab[r->i].cls)) {
/* move [reg], [stk] -> [reg] = load [stk] */
assert(r == &ins->r && ins->l.t == RREG);
ins->reg = ins->l.i+1;
- ins->op = cls2load[ins->cls];
+ ins->op = cls2load[instrtab[r->i].cls];
ins->r = NOREF;
addstkslotref(temp, alloc->a*8);
- } else if (alloc && alloc->t == ASTACK && ins->op == Ocopy && r == &ins->l && ins->reg) {
+ } else if (alloc && alloc->t == ASTACK && ins->op == Ocopy && r == &ins->l && ins->reg && kisint(ins->cls) == kisint(instrtab[r->i].cls)) {
/* [reg] = copy [stk] -> [reg] = load [stk] */
- ins->op = cls2load[ins->cls];
+ ins->op = cls2load[instrtab[r->i].cls];
addstkslotref(temp, alloc->a*8);
} else if (alloc && alloc->t == ASTACK) {
/* ref was spilled, gen load to scratch register and use it */