| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | ir: 'trap' jump; c: __builtin_trap; lex: __has_builtin | 2025-11-15 | 1 | -0/+2 | |
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| * | emit: stack alignment edgecases | 2025-11-15 | 1 | -5/+9 | |
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| * | preeliminary va_list support | 2025-11-14 | 1 | -3/+46 | |
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| * | amd64: fix positive RBP off (stack params); address encoding errata | 2025-11-12 | 1 | -2/+2 | |
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| * | amd64: get rid of xinc/xdec. handle those at emit stage | 2025-11-09 | 1 | -8/+6 | |
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| * | amd64: errata with unsigned greater than or equal (should be JAE) | 2025-11-06 | 1 | -1/+1 | |
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| * | isel fixes | 2025-10-30 | 1 | -1/+0 | |
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| * | emit: remove unnecessary REX.W prfix for TEST r8 | 2025-10-26 | 1 | -1/+1 | |
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| * | amd64: add/sub operands less restrictive | 2025-10-25 | 1 | -2/+2 | |
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| * | c: avoid generating relocations in .rodata (putting such objects in .data ↵ | 2025-10-25 | 1 | -1/+3 | |
| | | | | | instead for now) | ||||
| * | emit: PU8, PU16 | 2025-10-25 | 1 | -0/+6 | |
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| * | amd64 rbpoff | 2025-10-24 | 1 | -1/+1 | |
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| * | amd64 missing stuff | 2025-10-23 | 1 | -1/+2 | |
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| * | amd64: load/store from abs address constants; movabs | 2025-10-23 | 1 | -11/+32 | |
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| * | amd64/emit PI8 fix int overflow edgecase | 2025-10-23 | 1 | -1/+1 | |
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| * | fix edge case codegen bugs (w/ stack offsets, spilling) | 2025-10-22 | 1 | -0/+2 | |
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| * | amd64/emit errata | 2025-10-20 | 1 | -1/+1 | |
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| * | Organize source files into directories | 2025-10-19 | 1 | -1/+1 | |
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| * | amd64: float conversion insntrs | 2025-10-18 | 1 | -2/+30 | |
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| * | codegen bugfix | 2025-10-17 | 1 | -5/+13 | |
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| * | amd64: not, udiv | 2025-10-14 | 1 | -0/+13 | |
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| * | amd64: mul -> imul | 2025-10-13 | 1 | -8/+9 | |
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| * | fix some more codegen bugs for symbol constants | 2025-09-16 | 1 | -2/+1 | |
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| * | codegen: fix 3-address sub reg,imm codegen | 2025-09-15 | 1 | -1/+1 | |
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| * | start implementing bitfields | 2025-09-14 | 1 | -0/+6 | |
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| * | codegen: float cmp, ior; frontend: fix cond expr bug | 2025-09-14 | 1 | -3/+16 | |
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| * | preliminary pie and pic | 2025-09-14 | 1 | -11/+37 | |
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| * | regalloc: basic spilling support | 2025-09-13 | 1 | -0/+6 | |
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| * | amd64: improve codegen for ADD | 2025-09-11 | 1 | -0/+3 | |
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| * | amd64: bugfix for stack args with no RBP, also reuse epilogue code? | 2025-09-11 | 1 | -26/+48 | |
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| * | amd64/emit: fix order of stack restore operations with regs+stk | 2025-09-09 | 1 | -6/+11 | |
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| * | ioper | 2025-09-09 | 1 | -12/+21 | |
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| * | fixes, delnops | 2025-09-09 | 1 | -2/+2 | |
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| * | amd64: swap, sar | 2025-09-08 | 1 | -1/+21 | |
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| * | amd64: bugfix | 2025-09-08 | 1 | -4/+9 | |
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| * | amd64: add mulf and divf codegen | 2023-08-07 | 1 | -3/+18 | |
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| * | amd64/emit bugfix | 2023-07-09 | 1 | -3/+3 | |
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| * | amd64 codegen fixes | 2023-07-07 | 1 | -12/+19 | |
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| * | fix emit() setcc and copy | 2023-07-06 | 1 | -1/+2 | |
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| * | misc bugfixs | 2023-06-30 | 1 | -19/+90 | |
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| * | add initializers (only static for initialier list rn) | 2023-06-29 | 1 | -27/+58 | |
| | | | | | and other fixes | ||||
| * | backend: don't mixup float and int temps | 2023-06-24 | 1 | -3/+3 | |
| | | | | | | | copy propagation only happens when dataclasses match, register allocator ignores hints if hint register class and instruction class differ, also add mov between int and float regs in amd64/emit | ||||
| * | backend: fix regalloc to work with more complex dataflow | 2023-06-24 | 1 | -4/+22 | |
| | | | | | | | | | basically an allocation map at the beginning (in) and end (out) of each block is kept and after the first allocation pass another pass is ran to resolve allocation conflicts between each edge, plus another pass to finish lowering phi functions. also introduced `regset` and plenty of other miscellaneous fixes | ||||
| * | change RMORE -> RADDR; use RXXX (RNONE) for special args,also undef | 2023-06-22 | 1 | -14/+14 | |
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| * | amd64: conform to ABI for varargs func calls | 2023-06-20 | 1 | -0/+9 | |
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| * | amd64/emit: ensure stack is 16-byte aligned | 2023-06-20 | 1 | -10/+29 | |
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| * | another emit() errata | 2023-06-20 | 1 | -1/+1 | |
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| * | fix regression | 2023-06-20 | 1 | -4/+4 | |
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| * | fix cls logic for comparison instrs | 2023-06-20 | 1 | -1/+2 | |
| | | | | | | | | | previously instr.cls always represented the output dataclass. this doesn't work for comparisons because we know the output is always a boolean integer and we care about the actual comparison dataclass. so now .cls represents the operation dataclass, which matches the result class except for comparisons where the result is always KI4V | ||||
| * | errata | 2023-06-20 | 1 | -2/+2 | |
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