| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | s/amd64/x86_64/ | 2025-12-12 | 1 | -1388/+0 | |
| | | |||||
| * | emit: turn ADD -imm into SUB imm | 2025-12-12 | 1 | -1/+5 | |
| | | |||||
| * | amd64/emit: change instr desc table a little | 2025-12-12 | 1 | -157/+158 | |
| | | |||||
| * | rename arraylength macro -> countof | 2025-12-11 | 1 | -10/+10 | |
| | | |||||
| * | parallel move; implement reg<->stack swp | 2025-12-10 | 1 | -2/+3 | |
| | | |||||
| * | misc fixes | 2025-12-10 | 1 | -3/+2 | |
| | | |||||
| * | amd64: fix wrong condition code being used for float gth | 2025-12-07 | 1 | -1/+1 | |
| | | | | | ughh | ||||
| * | amd64: use XORPS for floating point negation | 2025-12-07 | 1 | -0/+1 | |
| | | | | | | | | | | | Previously `neg x` was being turned into `sub 0, x`. But this gives the wrong result for zero/negative zero (-0.0 == -0.0 but 0.0 - 0.0 == 0.0), so it wasn't IEEE compliant or correct. Do what every other compiler does instead and flip the sign bit with an exclusive or. Should implement someway of deduplicating small data constants like the ones used here though. | ||||
| * | amd64: fix pseudo-push/pop float reg | 2025-12-05 | 1 | -2/+2 | |
| | | | | | | | With add/sub flags can be trashed which can result in miscompilations, use lea. This shouldn't even exist, need to get rid of xsave/xrestore, but for now fix this kludge | ||||
| * | amd64: handle unoredered float cmps | 2025-12-05 | 1 | -2/+30 | |
| | | |||||
| * | amd64/isel: fix addressing index shift being possibly too large to encode (duh) | 2025-11-29 | 1 | -0/+1 | |
| | | |||||
| * | amd64/emit: I64 consts and fp push/pop | 2025-11-24 | 1 | -7/+22 | |
| | | |||||
| * | amd64/emit: fix (partially) float comparisonsd | 2025-11-23 | 1 | -6/+10 | |
| | | |||||
| * | amd64/emit: this rbpoff approach is kinda broken.. | 2025-11-23 | 1 | -1/+1 | |
| | | |||||
| * | amd64/emit: fix REX-requiring 8-bit GPR encoding checking wrong reg | 2025-11-22 | 1 | -2/+2 | |
| | | |||||
| * | remove umul | 2025-11-21 | 1 | -1/+0 | |
| | | |||||
| * | change op names to match 285063eba44 | 2025-11-21 | 1 | -24/+24 | |
| | | |||||
| * | rename IR classes to reflect bitsize | 2025-11-21 | 1 | -29/+29 | |
| | | |||||
| * | isel: lower allocas a different way, such that stk address gets materialized ↵ | 2025-11-20 | 1 | -4/+4 | |
| | | | | | when necesary | ||||
| * | ir: 'trap' jump; c: __builtin_trap; lex: __has_builtin | 2025-11-15 | 1 | -0/+2 | |
| | | |||||
| * | emit: stack alignment edgecases | 2025-11-15 | 1 | -5/+9 | |
| | | |||||
| * | preeliminary va_list support | 2025-11-14 | 1 | -3/+46 | |
| | | |||||
| * | amd64: fix positive RBP off (stack params); address encoding errata | 2025-11-12 | 1 | -2/+2 | |
| | | |||||
| * | amd64: get rid of xinc/xdec. handle those at emit stage | 2025-11-09 | 1 | -8/+6 | |
| | | |||||
| * | amd64: errata with unsigned greater than or equal (should be JAE) | 2025-11-06 | 1 | -1/+1 | |
| | | |||||
| * | isel fixes | 2025-10-30 | 1 | -1/+0 | |
| | | |||||
| * | emit: remove unnecessary REX.W prfix for TEST r8 | 2025-10-26 | 1 | -1/+1 | |
| | | |||||
| * | amd64: add/sub operands less restrictive | 2025-10-25 | 1 | -2/+2 | |
| | | |||||
| * | c: avoid generating relocations in .rodata (putting such objects in .data ↵ | 2025-10-25 | 1 | -1/+3 | |
| | | | | | instead for now) | ||||
| * | emit: PU8, PU16 | 2025-10-25 | 1 | -0/+6 | |
| | | |||||
| * | amd64 rbpoff | 2025-10-24 | 1 | -1/+1 | |
| | | |||||
| * | amd64 missing stuff | 2025-10-23 | 1 | -1/+2 | |
| | | |||||
| * | amd64: load/store from abs address constants; movabs | 2025-10-23 | 1 | -11/+32 | |
| | | |||||
| * | amd64/emit PI8 fix int overflow edgecase | 2025-10-23 | 1 | -1/+1 | |
| | | |||||
| * | fix edge case codegen bugs (w/ stack offsets, spilling) | 2025-10-22 | 1 | -0/+2 | |
| | | |||||
| * | amd64/emit errata | 2025-10-20 | 1 | -1/+1 | |
| | | |||||
| * | Organize source files into directories | 2025-10-19 | 1 | -1/+1 | |
| | | |||||
| * | amd64: float conversion insntrs | 2025-10-18 | 1 | -2/+30 | |
| | | |||||
| * | codegen bugfix | 2025-10-17 | 1 | -5/+13 | |
| | | |||||
| * | amd64: not, udiv | 2025-10-14 | 1 | -0/+13 | |
| | | |||||
| * | amd64: mul -> imul | 2025-10-13 | 1 | -8/+9 | |
| | | |||||
| * | fix some more codegen bugs for symbol constants | 2025-09-16 | 1 | -2/+1 | |
| | | |||||
| * | codegen: fix 3-address sub reg,imm codegen | 2025-09-15 | 1 | -1/+1 | |
| | | |||||
| * | start implementing bitfields | 2025-09-14 | 1 | -0/+6 | |
| | | |||||
| * | codegen: float cmp, ior; frontend: fix cond expr bug | 2025-09-14 | 1 | -3/+16 | |
| | | |||||
| * | preliminary pie and pic | 2025-09-14 | 1 | -11/+37 | |
| | | |||||
| * | regalloc: basic spilling support | 2025-09-13 | 1 | -0/+6 | |
| | | |||||
| * | amd64: improve codegen for ADD | 2025-09-11 | 1 | -0/+3 | |
| | | |||||
| * | amd64: bugfix for stack args with no RBP, also reuse epilogue code? | 2025-09-11 | 1 | -26/+48 | |
| | | |||||
| * | amd64/emit: fix order of stack restore operations with regs+stk | 2025-09-09 | 1 | -6/+11 | |
| | | |||||