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* amd64/emit: I64 consts and fp push/pop lemon2025-11-241-7/+22
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* amd64/emit: fix (partially) float comparisonsd lemon2025-11-231-6/+10
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* amd64/emit: this rbpoff approach is kinda broken.. lemon2025-11-231-1/+1
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* amd64/emit: fix REX-requiring 8-bit GPR encoding checking wrong reg lemon2025-11-221-2/+2
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* remove umul lemon2025-11-211-1/+0
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* change op names to match 285063eba44 lemon2025-11-211-24/+24
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* rename IR classes to reflect bitsize lemon2025-11-211-29/+29
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* isel: lower allocas a different way, such that stk address gets materialized ↵ lemon2025-11-201-4/+4
| | | | when necesary
* ir: 'trap' jump; c: __builtin_trap; lex: __has_builtin lemon2025-11-151-0/+2
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* emit: stack alignment edgecases lemon2025-11-151-5/+9
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* preeliminary va_list support lemon2025-11-141-3/+46
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* amd64: fix positive RBP off (stack params); address encoding errata lemon2025-11-121-2/+2
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* amd64: get rid of xinc/xdec. handle those at emit stage lemon2025-11-091-8/+6
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* amd64: errata with unsigned greater than or equal (should be JAE) lemon2025-11-061-1/+1
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* isel fixes lemon2025-10-301-1/+0
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* emit: remove unnecessary REX.W prfix for TEST r8 lemon2025-10-261-1/+1
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* amd64: add/sub operands less restrictive lemon2025-10-251-2/+2
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* c: avoid generating relocations in .rodata (putting such objects in .data ↵ lemon2025-10-251-1/+3
| | | | instead for now)
* emit: PU8, PU16 lemon2025-10-251-0/+6
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* amd64 rbpoff lemon2025-10-241-1/+1
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* amd64 missing stuff lemon2025-10-231-1/+2
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* amd64: load/store from abs address constants; movabs lemon2025-10-231-11/+32
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* amd64/emit PI8 fix int overflow edgecase lemon2025-10-231-1/+1
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* fix edge case codegen bugs (w/ stack offsets, spilling) lemon2025-10-221-0/+2
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* amd64/emit errata lemon2025-10-201-1/+1
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* Organize source files into directories lemon2025-10-191-1/+1
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* amd64: float conversion insntrs lemon2025-10-181-2/+30
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* codegen bugfix lemon2025-10-171-5/+13
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* amd64: not, udiv lemon2025-10-141-0/+13
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* amd64: mul -> imul lemon2025-10-131-8/+9
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* fix some more codegen bugs for symbol constants lemon2025-09-161-2/+1
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* codegen: fix 3-address sub reg,imm codegen lemon2025-09-151-1/+1
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* start implementing bitfields lemon2025-09-141-0/+6
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* codegen: float cmp, ior; frontend: fix cond expr bug lemon2025-09-141-3/+16
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* preliminary pie and pic lemon2025-09-141-11/+37
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* regalloc: basic spilling support lemon2025-09-131-0/+6
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* amd64: improve codegen for ADD lemon2025-09-111-0/+3
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* amd64: bugfix for stack args with no RBP, also reuse epilogue code? lemon2025-09-111-26/+48
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* amd64/emit: fix order of stack restore operations with regs+stk lemon2025-09-091-6/+11
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* ioper lemon2025-09-091-12/+21
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* fixes, delnops lemon2025-09-091-2/+2
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* amd64: swap, sar lemon2025-09-081-1/+21
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* amd64: bugfix lemon2025-09-081-4/+9
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* amd64: add mulf and divf codegen lemon2023-08-071-3/+18
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* amd64/emit bugfix lemon2023-07-091-3/+3
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* amd64 codegen fixes lemon2023-07-071-12/+19
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* fix emit() setcc and copy lemon2023-07-061-1/+2
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* misc bugfixs lemon2023-06-301-19/+90
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* add initializers (only static for initialier list rn) lemon2023-06-291-27/+58
| | | | and other fixes
* backend: don't mixup float and int temps lemon2023-06-241-3/+3
| | | | | | copy propagation only happens when dataclasses match, register allocator ignores hints if hint register class and instruction class differ, also add mov between int and float regs in amd64/emit
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