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* backend: fix regalloc to work with more complex dataflow lemon2023-06-241-5/+6
* change RMORE -> RADDR; use RXXX (RNONE) for special args,also undef lemon2023-06-221-6/+6
* mem2reg: implement ssa construction; this breaks regalloc right now lemon2023-06-211-0/+7
* explicitly store predecessors in each block lemon2023-06-211-10/+10
* don't lower params and args to registers in abi0 lemon2023-06-201-0/+5
* fix cls logic for comparison instrs lemon2023-06-201-4/+7
* backend: compile comparison instrs and branches lemon2023-06-191-7/+1
* add %y symbol printing lemon2023-06-191-4/+2
* don't try to compile when debugging IR lemon2023-06-191-3/+2
* ELF output static data lemon2023-06-181-1/+1
* simpler handling of large constants in IR lemon2023-06-141-5/+5
* use a hashtable for addr refs lemon2023-06-131-2/+1
* lower allocas in isel() instead of emit() and misc fixes lemon2023-06-131-3/+3
* remove RPARAM, add Oparam, lower args/rets to abi regs in abi0 lemon2023-06-111-7/+4
* isel skeleton lemon2023-06-101-14/+37
* codegen skeleton lemon2023-06-061-1/+8
* encode calls a different way in the IR lemon2023-06-051-34/+39
* style lemon2023-06-051-5/+5
* strlits lemon2023-06-051-4/+53
* command line switch for debug options lemon2023-06-051-2/+2
* bugfix lemon2023-06-041-0/+4
* abi lowering pass lemon2023-06-041-10/+20
* basic ABI lowering of aggregates lemon2023-06-011-17/+29
* struct args and return lemon2023-06-011-14/+26
* regalloc skeleton lemon2023-05-311-4/+7
* phis? lemon2023-05-301-13/+26
* hm lemon2023-05-261-2/+2
* initial commit lemon2023-05-101-0/+124
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